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      1. 聯系人:劉先生



        • 產品名稱:NXP芯片NFC
        • 產品型號:NFC讀寫器MFRC523
        • 產品廠商:NXP
        • 產品文檔:
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        NFC讀寫器MFRC523 TSC9823兼容NXP MFRC523 ? MFRC52302 (HVQFN32), hereafter named as version 2.0 ? MFRC52301 (HVQFN32), hereafter named as version 1.0 The differences of the version 1.0 to the version 2.0 are summarized Supports ISO/IEC 14443 A/MIFARE ?Supports ISO/IEC 14443 B Read/Write modes


        MFRC5231. Introduction
        This document describes the functionality and electrical specifications of the contactless
        reader/writer MFRC523.
        1.1 Different available versions
        The MFRC523 is available in two versions:
        ? MFRC52302 (HVQFN32), hereafter named as version 2.0
        ? MFRC52301 (HVQFN32), hereafter named as version 1.0
        The differences of the version 1.0 to the version 2.0 are summarized in Section 11.
        2. General description
        The MFRC523 is a highly integrated reader/writer for contactless communication at
        13.56 MHz. The MFRC523 reader supports ISO/IEC 14443 A/MIFARE mode.
        The MFRC523’s internal transmitter is able to drive a reader/writer antenna designed to
        communicate with ISO/IEC 14443 A/MIFARE cards and transponders without additional
        active circuitry. The receiver module provides a robust and efficient implementation for
        demodulating and decoding signals from ISO/IEC 14443 A/MIFARE compatible cards and
        transponders. The digital module manages the complete ISO/IEC 14443 A framing and
        error detection (parity and CRC) functionality.
        All protocol layers of the ISO/IEC 14443 A and ISO/IEC 14443 B communication
        standards are supported provided:
        ? additional components, such as the oscillator, power supply, coil etc are correctly
        ? standardized protocols, such as ISO/IEC 14443-4 and/or ISO/IEC 14443 B
        anticollision are correctly implemented
        The MFRC523 supports contactless communication using MIFARE higher baud rates
        (see Section on page 22) at transfer speeds up to 848 kBd in both directions.
        The following host interfaces are provided:
        ? Serial Peripheral Interface (SPI)
        ? Serial UART (similar to RS232 with voltage levels dependent on pin voltage supply)
        ? I 2 C-bus interface
        Standard 3V ISO/IEC 14443 A/B reader solution
        Rev. 4.1 — 6 May 2015
        Product data sheet
        MFRC523 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
        Product data sheet
        Rev. 4.1 — 6 May 2015
        115241  2 of 101
        NXP Semiconductors MFRC523
        Standard 3V ISO/IEC 14443 A/B reader solution
        3. Features and benefits
        ? Highly integrated analog circuitry to demodulate and decode responses
        ? Buffered output drivers for connecting an antenna with the minimum number of
        external components
        ? Supports ISO/IEC 14443 A/MIFARE
        ? Supports ISO/IEC 14443 B Read/Write modes
        ? Typical operating distance in Read/Write mode up to 50 mm depending on the
        antenna size and tuning
        ? Supports MIFARE Mini, MIFARE 1K and MIFARE 4K encryption in Read/Write mode
        ? Supports ISO/IEC 14443 A higher transfer speed communication at 212 kBd, 424 kBd
        and 848 kBd
        ? Supports MFIN/MFOUT
        ? Additional internal power supply to the smart card IC connected via MFIN/MFOUT
        ? Supported host interfaces
        ? SPI up to 10 Mbit/s
        ? I 2 C-bus interface up to 400 kBd in Fast mode, up to 3400 kBd in High-speed mode
        ? RS232 Serial UART up to 1228.8 kBd, with voltage levels dependant on pin
        voltage supply
        ? FIFO buffer handles 64 byte send and receive
        ? Flexible interrupt modes
        ? Hard reset with low power function
        ? Power-down by software mode
        ? Programmable timer
        ? Internal oscillator for connection to 27.12 MHz quartz crystal
        ? 2.5 V to 3.3 V power supply
        ? CRC coprocessor
        ? Programmable I/O pins
        ? Internal self-test

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